Two schemes have typically been used when transmitting data through a transmission line that connects between two or more semiconductor chips.
The first scheme converts and transmits data signals into a difference in a current intensity that is output to the transmission line.
The second scheme converts data into a voltage difference at a transmitting side, carries the voltage difference on the transmission line, detects the voltage difference at a receiving side, and recovers the data.
The above-mentioned voltage driving scheme may be classified into a single voltage driving scheme that assigns one transmission line for each data according to the number of lines receiving one bit data and provides the data as the magnitude of the voltage value, and a differential voltage driving scheme that assigns two transmission lines for each data and provides the data as the dominance of the voltage value of transmission lines.
The differential voltage driving scheme remarkably reduces the distortion due to noise of the transmission signals as compared to the single voltage driving scheme, but has problems in that an interference phenomenon occurs between the transmission lines and that the parasitic capacitor component in the transmission lines is increased.
In particular, an output end of the transmission side is provided with a metal oxide semiconductor (MOS) switch in order to level-down logic signals to small signals and provides the logic signals as high or low. However, the MOS switch tends to have large parasitic capacitance, resulting in the parasitic capacitor component in the transmission lines.
Therefore, the input logic signals induce a coupling noise in the output small signals to cause the distortion of the output signal. Thereby, the trigger time of the output signal is long and the degradation of transmission speed occurs. In addition, the coupling noise voltages are induced differently to the differential voltage terminal, such that the common mode voltage fluctuates.